Bhasker, Jayaram.
Verilog HDL synthesis : a practical primer / J. Bhasker. - Hyderabad : BS Publication., 1998. - xx, 215 p. ; 23 cm.
Includes bibliographical references (p. 209) and index.
0965039153
98061058
Verilog (Computer hardware description language)
Logic design--Data processing.
TK7885.7 / .B5284 1998
621.39/2
Verilog HDL synthesis : a practical primer / J. Bhasker. - Hyderabad : BS Publication., 1998. - xx, 215 p. ; 23 cm.
Includes bibliographical references (p. 209) and index.
0965039153
98061058
Verilog (Computer hardware description language)
Logic design--Data processing.
TK7885.7 / .B5284 1998
621.39/2